Create a Logo with MS Publisher

Adapting a logo in Publisher may save you some time and money on logo design. Click where you want to insert a logo in the document. Click the “Design Gallery Object” icon on the Objects toolbar. Browse through the logo designs and select one that you like.

ASSEMBLY PROGRAM::: SUBTRACTION OF TWO 8 - BIT NO.

.model small .data num1 db 22h num2 db 11h .code .startup main: mov ax,@data mov ds,ax mov al,num1 sub al,num2 .exit end

ASSEMBLY PROGRAM:: ADD TWO 8 BIT NO.

.model small .data num1 db 22h num2 db 11h .code .startup main: mov ax,@data mov ds,ax mov al,num1 add al,num2 .exit end

X86 INSTRUCTIONS:::X86 INTERRUPT

Interrupts are special routines that are defined on a per-system basis. This means that the interrupts on one system might be different from the interrupts on another system. Therefore, it is usually a bad idea to rely heavily on interrupts when you are writing code that needs to be portable. What is an Interrupt? In modern operating systems, the programmer often doesn't need to use interrupts. In Windows, for example, the programmer conducts business with the Win32 API. However, these API calls interface with the kernel, and the kernel will often trigger interrupts to perform different tasks. In older operating systems (specifically DOS), the programmer didn't have an API to use, and so they had to do all their work through interrupts. Interrupt Instruction This instruction issues the specified interrupt. For instance: Syntax 1 : int arg Calls interrupt 10 (0x0A (hex) = 10 (decimal)). Syntax 2 : int 0x0A Types of Interrupts There are 3 types of interrupts: Hardware Interrupts, Software Interrupts and Exceptions. Hardware Interrupts Hardware interrupts are triggered by hardware devices. For instance, when you type on your keyboard, the keyboard triggers a hardware interrupt. The processor stops what it is doing, and executes the code that handles keyboard input (typically reading the key you pressed into a buffer in memory). Hardware interrupts are typically asynchronous - their occurrence is unrelated to the instructions being executed at the time they are raised. Software Interrupts There are also a series of software interrupts that are usually used to transfer control to a function in the operating system kernel. Software interrupts are triggered by the instruction int. For example, the instruction "int 14h" triggers interrupt 0x14. The processor then stops the current program, and jumps to the code to handle interrupt 14. When interrupt handling is complete, the processor returns flow to the original program. Exceptions Exceptions are caused by exceptional conditions in the code which is executing, for example an attempt to divide by zero or access a protected memory area. The processor will detect this problem, and transfer control to a handler to service the exception. This handler may re-execute the offending code after changing some value (for example, the zero dividend), or if this cannot be done, the program causing the exception may be terminated.

X86 INSTRUCTIONS:::OTHER INSTRUCTION:::SYSTEM INSTRUCTIONS

These instructions were added with the Pentium II. Syntax 1 : sysenter This instruction causes the processor to enter protected system mode (supervisor mode or "kernel mode"). Syntax 2 : sysexit This instruction causes the processor to leave protected system mode, and enter user mode.

X86 INSTRUCTIONS:::OTHER INSTRUCTION:::I/O INSTRUCTIONS

The IN instruction almost always has the operands AX and DX (or EAX and EDX) associated with it. DX (src) frequently holds the port address to read, and AX (dest) receives the data from the port. In Protected Mode operating systems, the IN instruction is frequently locked, and normal users can't use it in their programs. Syntax 1 : in src, dest #GAS Syntax in dest, src #Intel syntax The OUT instruction is very similar to the IN instruction. OUT outputs data from a given register (src) to a given output port (dest). In protected mode, the OUT instruction is frequently locked so normal users can't use it. Syntax 2 : out src, dest #GAS Syntax out dest, src #Intel syntax

X86 INSTRUCTIONS:::OTHER INSTRUCTION:::FLAGS INSTRUCTIONS

While the flags register is used to report on results of executed instructions (overflow, carry, etc.), it also contains flags that affect the operation of the processor. These flags are set and cleared with special instructions. Interrupt Flag The IF flag tells a processor if it should accept hardware interrupts. It should be kept set under normal execution. In fact, in protected mode, neither of these instructions can be executed by user-level programs. Syntax 1 : sti Sets the interrupt flag. If set, the processor can accept interrupts from peripheral hardware. Syntax 2 : cli Clears the interrupt flag. Hardware interrupts cannot interrupt execution. Programs can still generate interrupts, called software interrupts, and change the flow of execution. Non-maskable interrupts (NMI) cannot be blocked using this instruction. Direction Flag The DF flag tells the processor which way to read data when using string instructions. That is, whether to decrement or increment the esi and edi registers after a movs instruction. Syntax 1 : std Sets the direction flag. Registers will decrement, reading backwards. Syntax 2 : cld Clears the direction flag. Registers will increment, reading forwards. Carry Flag The CF flag is often modified after arithmetic instructions, but it can be set or cleared manually as well. Syntax 1 : stc Sets the carry flag. Syntax 2 : clc Clears the carry flag. Syntax 3 : cmc Complements (inverts) the carry flag. Other Syntax 1 : sahf Stores the content of AH register into the lower byte of the flag register. Syntax 2 : lahf Loads the AH register with the contents of the lower byte of the flag register.

X86 INSTRUCTIONS:::OTHER INSTRUCTION:::STACK INSTRUCTIONS

Push instruction decrements the stack pointer and stores the data specified as the argument into the location pointed to by the stack pointer. Syntax 1 : push arg Pop instruction loads the data stored in the location pointed to by the stack pointer into the argument specified and then increments the stack pointer. Syntax 2 : pop arg Example : mov eax, 5 mov ebx, 6 push eax #The stack is now: [5] push ebx #The stack is now: [6] [5] /*The topmost item (which is 6) is now stored in eax. The stack is now: [5]*/ pop eax #ebx is now equal to 5. The stack is now empty. pop ebx Pushf instruction decrements the stack pointer and then loads the location pointed to by the stack pointer with the contents of the flag register. Syntax 1 : pushf Popf instruction loads the flag register with the contents of the memory location pointed to by the stack pointer and then increments the contents of the stack pointer. Syntax 2 : popf Pusha instruction pushes all the general purpose registers onto the stack in the following order: AX, CX, DX, BX, SP, BP, SI, DI. The value of SP pushed is the value before the instruction is executed. It is useful for saving state before an operation that could potential change these registers. Syntax 1 : pusha Popa instruction pops all the general purpose registers off the stack in the reverse order of PUSHA. That is, DI, SI, BP, SP, BX, DX, CX, AX. Used to restore state after a call to PUSHA. Syntax 2 : popa Pushad instruction works similarly to pusha, but pushes the 32-bit general purpose registers onto the stack instead of their 16-bit counterparts. Syntax 1 : pushad Popad instruction works similarly to popa, but pops the 32-bit general purpose registers off of the stack instead of their 16-bit counterparts. Syntax 2 : popad

X86 INSTRUCTIONS:::SHIFT AND ROTATE:::FOR A ROTATE

Rotate Instructions In a rotate instruction, the bits that slide off the end of the register are fed back into the spaces. Rotate dest to the right by src bits. Syntax 1 : ror src, dest #GAS Syntax ror dest, src #Intel syntax Rotate dest to the left by src bits. Syntax 2 : rol src, dest #GAS Syntax rol dest, src #Intel syntax Rotate With Carry Instructions Like with shifts, the rotate can use the carry bit as the "extra" bit that it shifts through. Rotate dest to the right by src bits with carry. Syntax 1 : rcr src, dest #GAS Syntax rcr dest, src #Intel syntax Rotate dest to the left by src bits with carry. Syntax 2 : rcl src, dest #GAS Syntax rcl dest, src #Intel syntax Number of arguments Unless stated, these instructions can take either one or two arguments. If only one is supplied, it is assumed to be a register or memory location and the number of bits to shift/rotate is one (this may be dependent on the assembler in use, however). shrl $1, %eax is equivalent to shrl %eax (GAS syntax).

X86 INSTRUCTIONS:::SHIFT AND ROTATE:::FOR A SHIFT

Logical Shift Instructions In a logical shift instruction (also referred to as unsigned shift), the bits that slide off the end disappear (except for the last, which goes into the carry flag), and the spaces are always filled with zeros. Logical shifts are best used with unsigned numbers. Syntax 1 : shr src, dest #GAS Syntax shr dest, src #Intel syntax Logical shift dest to the right by src bits. Syntax 2 : shl src, dest #GAS Syntax shl dest, src #Intel syntax Logical shift dest to the left by src bits. Example (GAS Syntax) : /*ax=1111.1111.0000.0000 (0xff00, unsigned 65280, signed -256)*/ movw $ff00,%ax /*ax=0001.1111.1110.0000 (0x1fe0, signed and unsigned 8160)*/ shrw $3,%ax /*(logical shifting unsigned numbers right by 3 is like integer division by 8)*/ /*ax=0011.1111.1100.0000 (0x3fc0, signed and unsigned 16320)*/ shlw $1,%ax /*(logical shifting unsigned numbers left by 1 is like multiplication by 2)*/ Arithmetic Shift Instructions In an arithmetic shift (also referred to as signed shift), like a logical shift, the bits that slide off the end disappear (except for the last, which goes into the carry flag). But in an arithmetic shift, the spaces are filled in such a way to preserve the sign of the number being slid. For this reason, arithmetic shifts are better suited for signed numbers in two's complement format. Syntax 1 : sar src, dest #GAS Syntax sar dest, src #Intel syntax Arithmetic shift dest to the right by src bits. Spaces are filled with sign bit (to maintain sign of original value), which is the original highest bit. Syntax 2 : sal src, dest #GAS Syntax sal dest, src #Intel syntax Arithmetic shift dest to the left by src bits. The bottom bits do not affect the sign, so the bottom bits are filled with zeros. This instruction is synonymous with SHL. Example (GAS Syntax) : /*ax=1111.1111.0000.0000 (0xff00, unsigned 65280, signed -256)*/ movw $ff00,%ax /*ax=1111.1100.0000.0000 (0xfc00, unsigned 64512, signed -1024)*/ salw $2,%ax /*(arithmetic shifting left by 2 is like multiplication by 4 for negative numbers, but has an impact on positives with most significant bit set (i.e. set bits shifted out))*/ /*ax=1111.1111.1110.0000 (0xffe0, unsigned 65504, signed -32)*/ sarw $5,%ax /*(arithmetic shifting right by 5 is like integer division by 32 for negative numbers)*/ Extended Shift Instructions The names of the double precision shift operations are somewhat misleading, hence they are listed as extended shift instructions on this page. They are available for use with 16- and 32-bit data entities (registers/memory locations). The src operand is always a register, the dest operand can be a register or memory location, the cnt operand is an immediate byte value or the CL register. In 64-bit mode it is possible to address 64-bit data as well. The operation performed by shld is to shift the most significant cnt bits out of dest, but instead of filling up the least significant bits with zeros, they are filled with the most significant cnt bits of src. Syntax 1 : shld cnt, src, dest #GAS Syntax shld dest, src, cnt #Intel syntax Likewise, the shrd operation shifts the least significant cnt bits out of dest, and fills up the most significant cnt bits with the least significant bits of the src operand. Syntax 2 : shrd cnt, src, dest #GAS Syntax shrd dest, src, cnt #Intel syntax Intel's nomenclature is misleading, in that the shift does not operate on double the basic operand size (i.e. specifying 32-bit operands doesn't make it a 64-bit shift): the src operand always remains unchanged. Also, Intel's manual states that the results are undefined when cnt is greater than the operand size, but at least for 32- and 64-bit data sizes it has been observed that shift operations are performed by (cnt mod n), with n being the data size. Example (GAS Syntax) : # ax=0000.0000.0000.0000 (0x0000) xorw %ax,%ax # ax=1111.1111.1111.1111 (0xffff) notw %ax # bx=0101.0101.0000.0000 movw $0x5500,%bx # bx=1111.0101.0101.0000 (0xf550), ax is still 0xffff shrdw $4,%ax,%bx # ax=1111.1111.1111.0101 (0xfff5), bx is still 0xf550 shldw $8,%bx,%ax Example : (decimal numbers are used instead of binary number to explain the concept) : # ax = 1234 5678 # bx = 8765 4321 shrd $3, %ax, %bx # ax = 1234 5678 bx = 6788 7654 # ax = 1234 5678 # bx = 8765 4321 shld $3, %ax, %bx # bx = 5432 1123 ax = 1234 5678

X86 INSTRUCTIONS::: LOGICAL INSTRUCTIONS

The instructions are of bit-wise logical instructions. Bit-wise AND Syntax : and src, dest #GAS Syntax and dest, src #Intel syntax Performs a bit-wise AND of the two operands, and stores the result in dest. Example : movl $0x1, %edx movl $0x0, %ecx andl %edx, %ecx ; here ecx would be 0 because 1 AND 0 = 0 Bit-wise OR Syntax : or src, dest #GAS Syntax or dest, src #Intel syntax Performs a bit-wise OR of the two operands, and stores the result in dest. Example : movl $0x1, %edx movl $0x0, %ecx orl %edx, %ecx ; here ecx would be 1 because 1 OR 0 = 1 Bit-wise XOR Syntax : xor src, dest #GAS Syntax xor dest, src #Intel syntax Performs a bit-wise XOR of the two operands, and stores the result in dest. Example : movl $0x1, %edx movl $0x0, %ecx xorl %edx, %ecx ; here ecx would be 1 because 1 XOR 0 = 1 Bit-wise Inversion Syntax : not arg Performs a bit-wise inversion of arg. Example : movl $0x1, %edx notl %edx /*here edx would be 0xFFFFFFFE because a bitwise NOT 0x00000001 = 0xFFFFFFFE*/

X86 INSTRUCTIONS::: CARRY AIRTHMETIC INSTRUCTION

Syntax 1 : adc src, dest #GAS Syntax adc dest, src #Intel syntax Add with carry. Adds src + carry flag to dest, storing result in dest. Usually follows a normal add instruction to deal with values twice as large as the size of the register. In the following example, source contains a 64-bit number which will be added to destination. Example : mov eax, [source] ; read low 32 bits mov edx, [source+4] ; read high 32 bits add [destination], eax ; add low 32 bits adc [destination+4], edx ; add high 32 bits, plus carry Syntax 2 : sbb src, dest #GAS Syntax sbb dest, src #Intel syntax Subtract with borrow. Subtracts src + carry flag from dest, storing result in dest. Usually follows a normal sub instruction to deal with values twice as large as the size of the register.

X86 INSTRUCTIONS:::AIRTHMETIC INSTRUCTION

Arithmetic instructions take two operands: a destination and a source. The destination must be a register or a memory location. The source may be either a memory location, a register, or a constant value. Atleast one of the two must be a register, because operations may not use a memory location as both a source and a destination. Syntax 1 : add src, dest #GAS Syntax add dest, src #Intel syntax This adds src to dest. If you are using the MASM syntax, then the result is stored in the first argument, if you are using the GAS syntax, it is stored in the second argument. Syntax 2 : sub src, dest #GAS Syntax sub dest, src #Intel syntax Like ADD, only it subtracts source from destination instead. In C: dest -= src; Syntax 3 : mul arg This multiplies "arg" by the value of corresponding byte-length in the AX register. operand size 1 byte 2 bytes 4 bytes other operand AL AX EAX higher part of result stored in: AH DX EDX lower part of result stored in: AL AX EAX In the second case, the target is not EAX for backward compatibility with code written for older processors. Syntax 4 : imul arg As MUL, only signed. The IMUL instruction has the same format as MUL, but also accepts two other formats like so: Syntax 5 : imul src, dest #GAS Syntax imul dest, src #Intel syntax This multiplies src by dest. If you are using the NASM syntax, then the result is stored in the first argument, if you are using the GAS syntax, it is stored in the second argument. Syntax 6 : imul aux, src, dest #GAS Syntax imul dest, src, aux #Intel syntax This multiplies src by aux and places it into dest. If you are using the NASM syntax, then the result is stored in the first argument, if you are using the GAS syntax, it is stored in the third argument. Syntax 7 : div arg This divides the value in the dividend register(s) by "arg", see table below. divisor size 1 byte 2 bytes 4 bytes dividend AX DX:AX EDX:EAX remainder stored in: AH DX EDX quotient stored in: AL AX EAX The colon (:) means concatenation. With divisor size 4, this means that EDX are the bits 32-63 and EAX are bits 0-31 of the input number (with lower bit numbers being less significant, in this example). As you typically have 32-bit input values for division, you often need to use CDQ to sign-extend EAX into EDX just before the division. If quotient does not fit into quotient register, arithmetic overflow interrupt occurs. All flags are in undefined state after the operation. Syntax 8 : idiv arg As DIV, only signed. Syntax 9 : neg arg Arithmetically negates the argument (i.e. two's complement negation).

X86 INSTRUCTIONS:::CONTROL FLOW:::JUMP INSTRUCTION:::OTHER CONTROL INSTRUCTION

Syntax 1 : hlt Halts the processor. Execution will be resumed after processing next hardware interrupt, unless IF is cleared. Syntax 2 : nop No operation. This instruction doesn't do anything, but wastes an instruction cycle in the processor. This instruction is often represented as an XCHG operation with the operands EAX and EAX. Syntax 3 : lock Asserts #LOCK prefix on next instruction. Syntax 4 : wait Waits for the FPU to finish its last calculation.

X86 INSTRUCTIONS:::CONTROL FLOW:::JUMP INSTRUCTION:::ENTER AND LEAVE

Syntax 1 : enter arg Creates a stack frame with the specified amount of space allocated on the stack. Syntax 2 : leave Destroys the current stack frame, and restores the previous frame. Using Intel syntax this is equivalent to: Syntax 3 : mov esp, ebp pop ebp This will set EBP and ESP to their respective value before the function prologue began therefore reversing any modification to the stack that took place during the prologue.

X86 INSTRUCTIONS:::CONTROL FLOW::: JUMP INSTRUCTIONS:::LOOP INSTRUCTION

Syntax : loop arg The loop instruction decrements ECX and jumps to the address specified by arg unless decrementing ECX caused its value to become zero. Example mov ecx, 5 start_loop: ; the code here would be executed 5 times loop start_loop loop does not set any flags. Syntax : loopx arg These loop instructions decrement ECX and jump to the address specified by arg if their condition is satisfied (that is, a specific flag is set), unless decrementing ECX caused its value to become zero. loope loop if equal loopne loop if not equal loopnz loop if not zero loopz loop if zero

X86 INSTRUCTIONS:::CONTROL FLOW:::JUMP INSTRUCTION::: FUNCTION CALLS

Syntax : call proc Pushes the address of the next opcode onto the top of the stack, and jumps to the specified location. This is used mostly for subroutines. Syntax : ret [val] Loads the next value on the stack into EIP, and then pops the specified number of bytes off the stack. If val is not supplied, the instruction will not pop any values off the stack after returning